Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/6521
Title: | VLSI design of low power digital FIR filter using PSPICE and VLSI design of high speed digital FIR filter using VERILOG HDL |
Researcher: | Vigneswaran T |
Guide(s): | Malarvizhi, S |
Keywords: | Electronics and Communication VLSI PSPICE VERILOG HDL |
Upload Date: | 18-Jan-2013 |
University: | SRM University |
Completed Date: | November, 2008 |
Abstract: | Included |
Pagination: | -- |
URI: | http://hdl.handle.net/10603/6521 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 15.04 kB | Adobe PDF | View/Open |
02_certificate & declarations.pdf | 9.83 kB | Adobe PDF | View/Open | |
03_acknowledgement & abstract.pdf | 15.1 kB | Adobe PDF | View/Open | |
04_contents.pdf | 17.04 kB | Adobe PDF | View/Open | |
05_list of tables fgures & abbreviations.pdf | 24.27 kB | Adobe PDF | View/Open | |
06_part i_chapter 1.pdf | 16.17 kB | Adobe PDF | View/Open | |
07_chapter 2.pdf | 12.51 kB | Adobe PDF | View/Open | |
08_chapter 3.pdf | 21.39 kB | Adobe PDF | View/Open | |
09_chapter 4.pdf | 79.05 kB | Adobe PDF | View/Open | |
10_chapter 5.pdf | 91.83 kB | Adobe PDF | View/Open | |
11_chapter 6.pdf | 55.57 kB | Adobe PDF | View/Open | |
12_chapter 7.pdf | 70.75 kB | Adobe PDF | View/Open | |
13_chapter 8.pdf | 11.51 kB | Adobe PDF | View/Open | |
14_references.pdf | 17.67 kB | Adobe PDF | View/Open | |
15_part ii_chapter 1-3.pdf | 73.9 kB | Adobe PDF | View/Open | |
16_chapter 4-5.pdf | 132.62 kB | Adobe PDF | View/Open | |
17_chapter 6-7.pdf | 412.66 kB | Adobe PDF | View/Open | |
18_references.pdf | 995.25 kB | Adobe PDF | View/Open |
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