Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/595298
Title: | Design and Simulation of Ultra Low Voltage Analog Front End for Digital Hearing Aid Applications |
Researcher: | Panchal, Dipeshkumar Jashvantbhai |
Guide(s): | Naik, Amisha |
Keywords: | Analog Engineering Engineering and Technology Engineering Electrical and Electronic Simulation |
University: | Nirma University |
Completed Date: | 2024 |
Abstract: | The World Health Organization (WHO) estimates that 466 million individuals worldwide newlinesuffer from hearing loss that is incapacitating. By 2050, this figure is predicted newlineto rise to nearly 900 million because of aging populations and other causes. Battery newlinelife due to large power consumption is a risky issue for multi-function portable digital newlinehearing aids in terms of maintaining viability. The analog front end of a digital hearing newlineaid chip has been found to consume an average of 61.8 % of power, published in newlinea literature. Also, even this percentage may rise further with Bluetooth and wireless newlinestreaming. Typical blocks like amplifiers and data converters reported in the literature newlineto construct an analog front end of a digital hearing aid with a larger value of supply newlinevoltage, consume large battery power. newlineCircuits with ultra-low voltage are frequently used in situations where energy harvesting, newlineportability, and power efficiency are important factors. Biomedical implants, newlinebattery-operated gadgets, energy-efficient electronics, and Internet of Things sensors newlineare a few examples. Because of the constraints placed on lower voltage levels, designing newlinecircuits to function at ultra-low voltages brings special difficulties. However, newlinedevelopments in circuit design methods, power management techniques, and semiconductor newlinetechnology have made it possible to create ultra-low voltage systems that are newlinemore dependable and efficient than before. newlineIn this thesis, an energy-efficient analog front-end architecture is designed for a digital newlinehearing aid chip with ultra-voltage methods. The comparative analysis of gate-driven, newlinebulk-driven, and gate-bulk-driven single-stage differential amplifiers performed with newlineultra-low voltage. The gate-bulk-driven differential amplifier cell is used in logarithmic newlineamplifiers with a piecewise linear approximation architecture. In amplifier circuits, newlineespecially audio amplifiers, DC offset cancellation networks play a crucial role in reducing newlineor eliminating any potential direct current (DC) voltage at the outp |
Pagination: | |
URI: | http://hdl.handle.net/10603/595298 |
Appears in Departments: | Institute of Technology |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
10. chapter 6.pdf | Attached File | 251.81 kB | Adobe PDF | View/Open |
11. chapter 7.pdf | 87.59 kB | Adobe PDF | View/Open | |
12. annexures.pdf | 4.21 MB | Adobe PDF | View/Open | |
1. title page.pdf | 190.41 kB | Adobe PDF | View/Open | |
2. prelim pages.pdf | 338.56 kB | Adobe PDF | View/Open | |
3. content.pdf | 47.19 kB | Adobe PDF | View/Open | |
4. abstract.pdf | 70.96 kB | Adobe PDF | View/Open | |
5. chapter 1.pdf | 132.48 kB | Adobe PDF | View/Open | |
6. chapter 2.pdf | 1.02 MB | Adobe PDF | View/Open | |
7. chapter 3.pdf | 955.95 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 280.18 kB | Adobe PDF | View/Open | |
8. chapter 4.pdf | 2.05 MB | Adobe PDF | View/Open | |
9. chapter 5.pdf | 441.37 kB | Adobe PDF | View/Open |
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