Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/594476
Title: Energy efficient load aware Dynamic Memory Management for System on Chip
Researcher: SUNDARI K S
Guide(s): NARMADHA R
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Sathyabama Institute of Science and Technology
Completed Date: 2023
Abstract: The increasing the escalating complexity and growing demand for downsizing in System-on-Chip (SoC) design underscore the significance of efficient memory management techniques. To address increasing computational demands and energy constraints in contemporary computing, this research introduces two pioneering algorithms: Energy-Efficient Load-Aware Memory Management (ELMM) and Shared Distributed Memory (SDM). These algorithms are specifically tailored to optimize dynamic memory management in System-on-Chip (SoC) architectures. newlineThe proposed ELMM technique minimizes additional storage requirements after mapping using a Task Monitoring Algorithm, thereby reducing energy consumption. The ELMM system for SoCs utilizes Field-Programmable Gate Arrays (FPGAs) to offload computational load from the main CPU core. A novel Memory Mapping Algorithm is developed to optimize data placement on the reconfigurable fabric, benefiting both software and hardware components. newlineThe integration of FPGAs into SoC platforms has revolutionized design possibilities by enabling efficient computational load distribution. However, effective memory management is critical to ensuring optimal performance and minimizing power consumption. To address this, the proposed ELMM system leverages load-aware techniques to intelligently allocate and manage memory resources. The system dynamically maps data onto the reconfigurable fabric by analyzing the computational load of different tasks, maximizing memory newlineviii newlineutilization. The Memory Mapping Algorithm, utilizing an energy- efficient load-aware dynamic, provides a robust solution to the issues posed by electricity machine systems. The successful integration has significant potential to enhance a generic variety of applications. newlineExperimental results reveal that the FPGA-based ELMM system achieves superior performance, exhibiting lower latency, minimal resource overhead, and reduced power consumption compared to existing approaches.
Pagination: vi, 193
URI: http://hdl.handle.net/10603/594476
Appears in Departments:ELECTRONICS DEPARTMENT

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02_prelim pages.pdf797.89 kBAdobe PDFView/Open
03_content.pdf205.99 kBAdobe PDFView/Open
04_abstract.pdf16.25 kBAdobe PDFView/Open
05_chapter 1.pdf869.4 kBAdobe PDFView/Open
06_chapter 2.pdf376.32 kBAdobe PDFView/Open
07_chapter 3.pdf1.5 MBAdobe PDFView/Open
08_chapter 4.pdf2.1 MBAdobe PDFView/Open
09_chapter 5.pdf149.61 kBAdobe PDFView/Open
10_annexures.pdf1.04 MBAdobe PDFView/Open
80_recommendation.pdf132.87 kBAdobe PDFView/Open
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