Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/594099
Title: Exploration of design approaches for performance aware and fault tolerant network on chip architectures
Researcher: Gogoi, Ankur
Guide(s): Ghoshal, Bibhas
Keywords: Computer Science
Computer Science Theory and Methods
Engineering and Technology
University: Indian Institute of Information Technology, Allahabad
Completed Date: 2024
Abstract: newline
Pagination: xxiv, 117p.
URI: http://hdl.handle.net/10603/594099
Appears in Departments:Information Technology

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01_title.pdfAttached File85.65 kBAdobe PDFView/Open
02_prelim pages.pdf264.54 kBAdobe PDFView/Open
03_content.pdf25.38 kBAdobe PDFView/Open
04_abstract.pdf32.8 kBAdobe PDFView/Open
05_chapter 1.pdf63.77 kBAdobe PDFView/Open
06_chapter 2.pdf263.15 kBAdobe PDFView/Open
07_chapter 3.pdf136.11 kBAdobe PDFView/Open
08_chapter 4.pdf454.66 kBAdobe PDFView/Open
09_chapter 5.pdf721.12 kBAdobe PDFView/Open
10_chapter 6.pdf561.95 kBAdobe PDFView/Open
11_annexures.pdf55.09 kBAdobe PDFView/Open
80_recommendation.pdf41.41 kBAdobe PDFView/Open
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