Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/592974
| Title: | Design and FPGA Realization of Energy Efficient Modular Arithmetic Architectures |
| Researcher: | Pakkiraiah, C |
| Guide(s): | Satyanarayana, R V S |
| Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
| University: | Sri Venkateswara University |
| Completed Date: | 2023 |
| Abstract: | newline |
| Pagination: | |
| URI: | http://hdl.handle.net/10603/592974 |
| Appears in Departments: | Department of Electronics & Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 80_recommendation.pdf | Attached File | 455.5 kB | Adobe PDF | View/Open |
| abstract.pdf | 122.96 kB | Adobe PDF | View/Open | |
| bibliography.pdf | 4.06 MB | Adobe PDF | View/Open | |
| chapter 1.pdf | 691.6 kB | Adobe PDF | View/Open | |
| chapter 2.pdf | 430.87 kB | Adobe PDF | View/Open | |
| chapter 3.pdf | 1.57 MB | Adobe PDF | View/Open | |
| chapter 4.pdf | 1.04 MB | Adobe PDF | View/Open | |
| chapter 5.pdf | 793.55 kB | Adobe PDF | View/Open | |
| content.pdf | 140.09 kB | Adobe PDF | View/Open | |
| prelims.pdf | 851.17 kB | Adobe PDF | View/Open | |
| title.pdf | 145.72 kB | Adobe PDF | View/Open |
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