Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/592605
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dc.coverage.spatialCertain investigations on performance enhancement of memristor based in memory computing architecture
dc.date.accessioned2024-09-30T06:22:32Z-
dc.date.available2024-09-30T06:22:32Z-
dc.identifier.urihttp://hdl.handle.net/10603/592605-
dc.description.abstractDue to the rapid development in the semiconductor industry, there newlineare various challenges in digital VLSI system design, particularly in data newlineintensive applications like medical imaging, autonomous car navigation, space newlineexploration, and underwater scenarios. This research highlights the challenges newlinefaced in modern VLSI system design, including high off-chip memory access newlinelatency, limited memory bandwidth, and significant data movement overhead, newlinewith delayed processing time and energy utilization. Energy efficiency, area, newlinedelays, and sneak path current are primary concerns, especially in portable newlineelectronic devices. A multiplication operation in an arithmetic unit is a newlinesignificant source of power dissipation in digital VLSI circuits. To address newlinethese challenges, the research focuses on developing efficient low-power newlinearithmetic circuits by approximate computing technique to reduce area and newlinedelay, specifically addressing power dissipation during idle states. newlineThe design of approximate computing architecture includes the newlinedesign of an approximate adder, its integration into multiplier circuits, and the newlineoptimization of memristor-based memory arrays. This adder introduces newlineminimal errors to outputs, significantly reducing power consumption while newlinepreserving accuracy. By integrating approximate computing techniques and newlinememristor-based memory solutions, the research seeks to improve the newlineperformance of digital VLSI systems across various applications including newlineimage processing, data storage and computation. Memristor-based In-memory newlinecomputing architecture is required to optimize memory elements and enhance newlineimage quality. newline
dc.format.extentxxi,125p.
dc.languageEnglish
dc.relationp.115-124
dc.rightsuniversity
dc.titleCertain investigations on performance enhancement of memristor based in memory computing architecture
dc.title.alternative
dc.creator.researcherDhanasekar, J
dc.subject.keywordautonomous car navigation
dc.subject.keywordComputer Science
dc.subject.keywordComputer Science Information Systems
dc.subject.keyworddigital VLSI system design
dc.subject.keywordEngineering and Technology
dc.subject.keywordsemiconductor industry
dc.description.note
dc.contributor.guideSudha, V K
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.date.registered
dc.date.completed2024
dc.date.awarded2024
dc.format.dimensions21cm.
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Faculty of Information and Communication Engineering

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01_title.pdfAttached File16.67 kBAdobe PDFView/Open
02_prelim pages.pdf2.36 MBAdobe PDFView/Open
03_content.pdf179.96 kBAdobe PDFView/Open
04_abstract.pdf145.99 kBAdobe PDFView/Open
05_chapter1.pdf271.63 kBAdobe PDFView/Open
06_chapter2.pdf144.82 kBAdobe PDFView/Open
07_chapter3.pdf1.92 MBAdobe PDFView/Open
08_chapter4.pdf1.37 MBAdobe PDFView/Open
09_chapter5.pdf1.11 MBAdobe PDFView/Open
10_annexures.pdf91.51 kBAdobe PDFView/Open
80_recommendation.pdf129.85 kBAdobe PDFView/Open


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