Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/592266
Title: | Design and Analysis of DMGUD TFET Using Gate Oxide Underlap for Ultra Low Power Applications |
Researcher: | Naga Swathi, T |
Guide(s): | Megala, V |
Keywords: | Engineering Engineering and Technology Instruments and Instrumentation |
University: | SRM Institute of Science and Technology |
Completed Date: | 2024 |
Pagination: | |
URI: | http://hdl.handle.net/10603/592266 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title page.pdf | Attached File | 148.61 kB | Adobe PDF | View/Open |
02_preliminary page.pdf | 655.82 kB | Adobe PDF | View/Open | |
03_content.pdf | 257.46 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 257.32 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 551.55 kB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 472.53 kB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 541.49 kB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 955.25 kB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 509.5 kB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 282.2 kB | Adobe PDF | View/Open | |
11_annexures.pdf | 442.38 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 295.44 kB | Adobe PDF | View/Open |
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