Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/592266
Title: Design and Analysis of DMGUD TFET Using Gate Oxide Underlap for Ultra Low Power Applications
Researcher: Naga Swathi, T
Guide(s): Megala, V
Keywords: Engineering
Engineering and Technology
Instruments and Instrumentation
University: SRM Institute of Science and Technology
Completed Date: 2024
Pagination: 
URI: http://hdl.handle.net/10603/592266
Appears in Departments:Department of Electronics and Communication Engineering

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01_title page.pdfAttached File148.61 kBAdobe PDFView/Open
02_preliminary page.pdf655.82 kBAdobe PDFView/Open
03_content.pdf257.46 kBAdobe PDFView/Open
04_abstract.pdf257.32 kBAdobe PDFView/Open
05_chapter 1.pdf551.55 kBAdobe PDFView/Open
06_chapter 2.pdf472.53 kBAdobe PDFView/Open
07_chapter 3.pdf541.49 kBAdobe PDFView/Open
08_chapter 4.pdf955.25 kBAdobe PDFView/Open
09_chapter 5.pdf509.5 kBAdobe PDFView/Open
10_chapter 6.pdf282.2 kBAdobe PDFView/Open
11_annexures.pdf442.38 kBAdobe PDFView/Open
80_recommendation.pdf295.44 kBAdobe PDFView/Open
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