Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/590334
Title: | Efficient Lower Computational Complexity VLSI Architecture Using Machine Learning Algorithms |
Researcher: | Yadav, Arpit Deepak |
Guide(s): | Jain, Swapnil |
Keywords: | Computational complexity Computer Science Computer Science Artificial Intelligence Engineering and Technology Integrated circuits--Very large scale integration Machine learning |
University: | Shri Vaishnav Vidyapeeth Vishwavidyalaya |
Completed Date: | 2023 |
Pagination: | |
URI: | http://hdl.handle.net/10603/590334 |
Appears in Departments: | Shri Vaishnav Institute of Technology and Science |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
80_recommendation.pdf | Attached File | 2.52 MB | Adobe PDF | View/Open |
abstract.pdf | 493.5 kB | Adobe PDF | View/Open | |
annexures.pdf | 5.57 MB | Adobe PDF | View/Open | |
chapter 1.pdf | 12.14 MB | Adobe PDF | View/Open | |
chapter 2.pdf | 5.46 MB | Adobe PDF | View/Open | |
chapter 3.pdf | 11.61 MB | Adobe PDF | View/Open | |
chapter 4.pdf | 2.7 MB | Adobe PDF | View/Open | |
chapter 5.pdf | 4.93 MB | Adobe PDF | View/Open | |
chapter 6.pdf | 8.05 MB | Adobe PDF | View/Open | |
chapter 7.pdf | 1.01 MB | Adobe PDF | View/Open | |
content.pdf | 969.45 kB | Adobe PDF | View/Open | |
prelim pages.pdf | 2.01 MB | Adobe PDF | View/Open | |
title.pdf | 116.91 kB | Adobe PDF | View/Open |
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