Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/590119
Title: Design and Analysis of Software Defined Radio Transmitter for 5G Applications
Researcher: Sanket N, Dessai
Guide(s): Patidar, Hemant
Keywords: 5G/6G
Engineering
Engineering and Technology
Engineering Electrical and Electronic
MIMO
University: Oriental University
Completed Date: 2024
Abstract: This thesis presents an efficient embedded computing architecture for the MIMO-OFDM and MIMO-OFDM-DBF system, featuring both programmability and reconfigurability for improved throughput. The developed embedded architecture is reconfigurable to perform as MIMO or MIMO-DBF or OFDM or OFDMA or MIMO-OFDM or MIMO-OFDM-DBF systems through programmable in hardware and software co-design. Simulation models serving as software architecture are developed for MIMO, MIMO-DBF, OFDM, OFDMA, MB-OFDMA, MIMO-OFDM and MIMO-OFDM-DBF systems to estimate their BER and throughput performance. Simulation studies carried out on the implementation of the developed software reference models on embedded architecture configured with the advanced processors of ARM families, reveal their inadequacy to meet the data rate requirements of 4G and 5G applications. Given the challenges of meeting the enormity of throughput and data rate requirements of emerging systems applications like 5G, this thesis proposes to modify the design of the computing architectures of MIMO, OFDM, MIMO-OFDM and MIMO-OFDM-DBF systems to increase their throughput. This thesis analyses the application of Systolic and CORDIC architectures to arrive at new design configurations of MIMO and OFDM systems. Systolic architecture is applied to develop the Viterbi Decoder, a sub system of MIMO. CORDIC architecture is applied in the development of programmable QAM to enhance the throughput and data rate of both MIMO and OFDM systems. Since OFDM is an extensively used modulation technique for the significant improvement of data rate, this thesis also focuses on the optimisation of the performance of FFT/IFFT blocks. This thesis proposes partitioning the OFDM system design to make simultaneous use of CPU-GPU and FPGA with the execution of FFT/IFFT blocks on GPU and Programmable QAM on FPGA. Other sub blocks of OFDM, such as the Viterbi decoder and programmable QAM, are chosen for their implementation on FPGA using Systolic and CORDIC architectures. The simulation results in baseband reveal that the developed programmable embedded architecture for MIMO and MIMO-DBF systems. newline
Pagination: 210
URI: http://hdl.handle.net/10603/590119
Appears in Departments:Electronics and Communication Engineering

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02_preliminary pages.pdf476.99 kBAdobe PDFView/Open
03_contents.pdf265.32 kBAdobe PDFView/Open
04_abstract.pdf9.11 kBAdobe PDFView/Open
05_chapter 1.pdf622.45 kBAdobe PDFView/Open
06_chapter 2.pdf257.35 kBAdobe PDFView/Open
07_chapter 3.pdf120.16 kBAdobe PDFView/Open
08_chapter 4.pdf2.47 MBAdobe PDFView/Open
09_chapter 5.pdf342.56 kBAdobe PDFView/Open
10_anexures.pdf1.67 MBAdobe PDFView/Open
11_chapter 6.pdf1.07 MBAdobe PDFView/Open
12_chapter 7.pdf226.21 kBAdobe PDFView/Open
80_recommendation.pdf13.24 kBAdobe PDFView/Open
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