Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/589906
| Title: | Leakage Current Utilization approach in Subthreshold Logic for SOC Design |
| Researcher: | Achutha Jyotsna Koppaka |
| Guide(s): | Satish Kumar P and Madhavi B K |
| Keywords: | CMOS Logic Current Mode Logic (CML) Engineering Engineering and Technology Engineering Electrical and Electronic SARADC Subthreshold Source Coupled Logic VCOADC |
| University: | Jawaharlal Nehru Technological University, Hyderabad |
| Completed Date: | 2024 |
| Abstract: | Attached |
| Pagination: | 176pp. |
| URI: | http://hdl.handle.net/10603/589906 |
| Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title.pdf | Attached File | 90.63 kB | Adobe PDF | View/Open |
| 02_prelim pages.pdf | 688.08 kB | Adobe PDF | View/Open | |
| 03_contents.pdf | 103.65 kB | Adobe PDF | View/Open | |
| 04_abstract.pdf | 52.4 kB | Adobe PDF | View/Open | |
| 05_chapter 1.pdf | 293.64 kB | Adobe PDF | View/Open | |
| 06_chapter 2.pdf | 435.02 kB | Adobe PDF | View/Open | |
| 07_chapter 3.pdf | 388.97 kB | Adobe PDF | View/Open | |
| 08_chapter 4.pdf | 546.91 kB | Adobe PDF | View/Open | |
| 09_chapter 5.pdf | 246.92 kB | Adobe PDF | View/Open | |
| 10_chapter 6.pdf | 239.53 kB | Adobe PDF | View/Open | |
| 11_chapter 7.pdf | 265.67 kB | Adobe PDF | View/Open | |
| 12_chapter 8.pdf | 70.51 kB | Adobe PDF | View/Open | |
| 13_annexures.pdf | 195.06 kB | Adobe PDF | View/Open | |
| 80_recommendation.pdf | 148.81 kB | Adobe PDF | View/Open |
Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).
Altmetric Badge: