Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/589337
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dc.coverage.spatial
dc.date.accessioned2024-09-13T12:39:50Z-
dc.date.available2024-09-13T12:39:50Z-
dc.identifier.urihttp://hdl.handle.net/10603/589337-
dc.description.abstractnewline
dc.format.extent
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDesign of a Power Efficient Carbon Nanotube Field Effect Transistor Based Ternary Logic Processor
dc.title.alternative
dc.creator.researcherGadgil, Sharvani
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.note
dc.contributor.guideChetan Kumar, V
dc.publisher.placePilani
dc.publisher.universityBirla Institute of Technology and Science
dc.publisher.institutionElectrical and Electronics Engineering
dc.date.registered2018
dc.date.completed2023
dc.date.awarded2023
dc.format.dimensions
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Electrical & Electronics Engineering

Files in This Item:
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01_title.pdfAttached File331.47 kBAdobe PDFView/Open
02_prelim pages.pdf329.83 kBAdobe PDFView/Open
03_contents.pdf93 kBAdobe PDFView/Open
04_abstract.pdf62.74 kBAdobe PDFView/Open
05_chapter 1.pdf403.75 kBAdobe PDFView/Open
06_chapter 2.pdf714.15 kBAdobe PDFView/Open
07_chapter 3.pdf1.06 MBAdobe PDFView/Open
08_chapter 4.pdf993.56 kBAdobe PDFView/Open
09_chapter 5.pdf1.39 MBAdobe PDFView/Open
10_chapter 6.pdf1.15 MBAdobe PDFView/Open
11_chapter 7.pdf115.39 kBAdobe PDFView/Open
12_bibliography.pdf102.38 kBAdobe PDFView/Open
80_recommendation.pdf103.11 kBAdobe PDFView/Open


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