Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/589337
Title: | Design of a Power Efficient Carbon Nanotube Field Effect Transistor Based Ternary Logic Processor |
Researcher: | Gadgil, Sharvani |
Guide(s): | Chetan Kumar, V |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Birla Institute of Technology and Science |
Completed Date: | 2023 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/589337 |
Appears in Departments: | Electrical & Electronics Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 331.47 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 329.83 kB | Adobe PDF | View/Open | |
03_contents.pdf | 93 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 62.74 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 403.75 kB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 714.15 kB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 1.06 MB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 993.56 kB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 1.39 MB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 1.15 MB | Adobe PDF | View/Open | |
11_chapter 7.pdf | 115.39 kB | Adobe PDF | View/Open | |
12_bibliography.pdf | 102.38 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 103.11 kB | Adobe PDF | View/Open |
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