Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/581668
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DC FieldValueLanguage
dc.coverage.spatialElectronics and Communication Engineering
dc.date.accessioned2024-08-08T09:00:07Z-
dc.date.available2024-08-08T09:00:07Z-
dc.identifier.urihttp://hdl.handle.net/10603/581668-
dc.description.abstractAvailable newline
dc.format.extent142p.
dc.languageEnglish
dc.relationNo. of References 113
dc.rightsuniversity
dc.titleDevelopment of ASIC based computational unit for stand alone image processing applications
dc.title.alternative-
dc.creator.researcherMendez, Tanya
dc.subject.keywordApplication Specific Integrated Circuit, Discrete cosine transform
dc.subject.keyworderror-tolerant adder, fixed-point multiplier, low-power
dc.subject.keywordpipelining, Verilog, power delay product, PSNR
dc.description.notebibliography p.131-142
dc.contributor.guideNayak, Subramanya G
dc.publisher.placeManipal
dc.publisher.universityManipal Academy of Higher Education
dc.publisher.institutionManipal Institute of Technology
dc.date.registered2021
dc.date.completed2024
dc.date.awarded2024
dc.format.dimensions-
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Manipal Institute of Technology

Files in This Item:
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01_title.pdfAttached File273.45 kBAdobe PDFView/Open
02_prelim pages.pdf689.2 kBAdobe PDFView/Open
03_content.pdf47.15 kBAdobe PDFView/Open
04_abstract.pdf48.06 kBAdobe PDFView/Open
05_chapter 1.pdf3.21 MBAdobe PDFView/Open
06_chapter 2.pdf563.6 kBAdobe PDFView/Open
07_chapter 3.pdf5.63 MBAdobe PDFView/Open
08_chapter 4.pdf8.09 MBAdobe PDFView/Open
09_chapter 5.pdf23.62 MBAdobe PDFView/Open
10_annexures.pdf132.76 kBAdobe PDFView/Open
80_recommendation.pdf341.8 kBAdobe PDFView/Open


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