Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/581668
Title: Development of ASIC based computational unit for stand alone image processing applications
Researcher: Mendez, Tanya
Guide(s): Nayak, Subramanya G
Keywords: Application Specific Integrated Circuit, Discrete cosine transform
error-tolerant adder, fixed-point multiplier, low-power
pipelining, Verilog, power delay product, PSNR
University: Manipal Academy of Higher Education
Completed Date: 2024
Abstract: Available newline
Pagination: 142p.
URI: http://hdl.handle.net/10603/581668
Appears in Departments:Manipal Institute of Technology

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01_title.pdfAttached File273.45 kBAdobe PDFView/Open
02_prelim pages.pdf689.2 kBAdobe PDFView/Open
03_content.pdf47.15 kBAdobe PDFView/Open
04_abstract.pdf48.06 kBAdobe PDFView/Open
05_chapter 1.pdf3.21 MBAdobe PDFView/Open
06_chapter 2.pdf563.6 kBAdobe PDFView/Open
07_chapter 3.pdf5.63 MBAdobe PDFView/Open
08_chapter 4.pdf8.09 MBAdobe PDFView/Open
09_chapter 5.pdf23.62 MBAdobe PDFView/Open
10_annexures.pdf132.76 kBAdobe PDFView/Open
80_recommendation.pdf341.8 kBAdobe PDFView/Open
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