Design and Investigation of High Performance Energy Efficient SRAM Cell with Improved Stability

Abstract

Increasing density of system on-chip (SoC) allows complex functionalities to be newlineperformed with high speed. Memory devices have significant role in supporting ad- newlinevancement of technology in applications like Internet of Things (IoT), Artificial Intel- newlineligence (AI), Wireless Sensor Networks (WSN), Edge Computing, Bio medical and hand-held devices etc. SRAM is used as cache memory in SoC designs due to volatile nature, faster access times and easy integration. Scaling supply voltage reduces energy per operation but poses challenges for SRAM designers with access times, data stability and leakage currents. newlineUsing advances in transistor technology like Floating Gate MOSFET (FGMOSFET), power efficiency of SRAM cell is improved in this thesis. Here SRAM cell is designed newlineto operate with low voltage below intended operational limits to reduce power without newlinecompromising on speed using threshold variability of FGMOSFET. newlineA novel reduced power with enhanced speed (RPES) technique for SRAM cell design newlineusing Carbon Nano Tube Field Effect Transistors (CNTFETs) is also proposed to reduce leakage currents. In this work, using CNTFETs threshold variability delay is decreased by using CNTFETs with different VT in critical paths. newlineTo improve cell stability, a novel CNTFET based Power Efficient and Robust-8T (PER- newline8T) SRAM cell is proposed which improves power efficiency with stability. In this by newlineelimination of nMOS device in pull-down network it improves write access times. This newlinemethod also offers better write margin by increasing pull-up ratio and data dependency newlineis reduced by improving RBL swing and this provides improved read margin. newlineSRAM cell is carefully optimised as parameters are dependent with one another. Growing need for SRAM in various applications motivated research work to optimise per- newlineformance metrics like power, delay and cell stability. In this thesis, we investigated for high performance SRAM cell with energy efficiency and improved stability. newline