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http://hdl.handle.net/10603/577893
Title: | Design and Development of Proportional Resonant Controlled Single Phase Fifteen Level Packed U Cell Multilevel Inverter for PV Applications |
Researcher: | NARENDRA KUMAR MUTHUKURI |
Guide(s): | M. SUBBARAO |
Keywords: | Engineering and Technology Engineering Engineering Electrical and Electronic |
University: | Vignans Foundation for Science Technology and Research |
Completed Date: | 2024 |
Abstract: | The need for electrical power in day-to-day activities is so great, that the generations of electrical power in the modern world is carried out with the assistance of renewable sources of energy (RES) such as the sun, the wind, biogas sources. In the past few decades PV applications have become more popular due to the availability of sun, there are numerous drawbacks in the PV architectures which include power electronic architectures, control algorithms, efficiency, switching losses, higher order harmonics, conduction losses and system cost. This thesis discusses multilevel inverters (MLI) due to the merit of lower harmonic content at higher levels, lower power loss on power switches, and lower electromagnetic interference (EMI) which is well suited for medium and high-power applications newlineNow a days numerous traditional multilevel inverters available, diode clamping circuit, cascaded H-bridge, H bridge and flying capacitors. Traditional MLIs are facing issues with their complexity, difficulty to control at higher levels, higher order harmonics, power losses, more cost because they require higher number of power semiconductor components, less efficiency, difficult to operate at lower switching frequency applications. The primary emphasis of this study was placed on developing a single-phase 15 level Packed U Cell Multilevel inverter which eliminates drawbacks in conventional inverters. The 15 level Packed U Cell Multilevel inverter offers the following features as its primary selling points: (i) The PUC consists of just 8 power semiconductor components, one power source and two DC link capacitors to build a fifteen-level inverter which required fewer components than those used in other usual to newest topologies. newline |
Pagination: | 203 |
URI: | http://hdl.handle.net/10603/577893 |
Appears in Departments: | Department of Electrical and Electronics engineering |
Files in This Item:
File | Description | Size | Format | |
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01_title.pdf | Attached File | 110.46 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 78.81 kB | Adobe PDF | View/Open | |
03_content.pdf | 239.04 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 129.93 kB | Adobe PDF | View/Open | |
05_chapter-1.pdf | 225.02 kB | Adobe PDF | View/Open | |
06_chapter-2.pdf | 355.26 kB | Adobe PDF | View/Open | |
07_chapter-3.pdf | 1.21 MB | Adobe PDF | View/Open | |
08_chapter-4.pdf | 803.51 kB | Adobe PDF | View/Open | |
09_chapter-5.pdf | 638.83 kB | Adobe PDF | View/Open | |
10_chapter-6.pdf | 1.98 MB | Adobe PDF | View/Open | |
11_chapter-7.pdf | 887.43 kB | Adobe PDF | View/Open | |
12_chapter-8.pdf | 788.72 kB | Adobe PDF | View/Open | |
13-_annexure.pdf | 1.22 MB | Adobe PDF | View/Open | |
80_recommendation.pdf | 1.03 MB | Adobe PDF | View/Open |
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