Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/573069
Title: Low Voltage Low Power Design of Operational Transconductance Amplifier
Researcher: RAJESH DURGAM
Guide(s): BHARTI CHOURASIA and NIKHIL RAJ
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Sarvepalli Radhakrishnan University
Completed Date: 2023
Abstract: The trend of technology scaling not only offers increased density but also low voltage operation of chip. However such scaling is not always found to be advantageous especially in analog circuits where precision and performance is an important parameter. To meet the low power goals under sub volt supply new design principles need to be adopted. The circuit requirements can be met in two ways either at structure level else at circuits level. Here the structure level indicates the use of MOSFET which can be easily operated at low supply for example in the present research work the emphasis has been given to Bulk Driven MOSFET, Quasi-Floating MOSFET and the combination of both. At circuit level the low power can be achieved by using low voltage processing block; in the present research work the flipped voltage follower has been adopted. In analog any information can be processed using lumped networks which can be in the form of nodal voltages or branch currents. newlineIn this thesis, design of fundamental block Operational Transconductance Amplifier is presented with improved performance parameters. Such amplifiers have extensive use in analog system design like filters, current conveyors etc. The proposed operational transconductance amplifier is designed using the non-conventional MOSFET structures and also using low voltage approach at circuit level. The research work starts with brief study on non-conventional MOSFET structures and then amplifier realization using the studied approach. The analysis gives out the observation of best approach as bulk driven in quasi-floating gate mode. It improves the features at low level of power consumption. Further work is carried in enhancing the gain and bandwidth of amplifier using cascode approach. The type of cascode adopted is self cascode. Such cascode topology reduces the channel length modulation effect providing high precision. However, instead of using traditional self cascode structure at output, the modified form of self cascode is used. The modification is carried in ter
Pagination: 
URI: http://hdl.handle.net/10603/573069
Appears in Departments:ELECTRONICS AND COMMUNICATION ENGINEERING

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10 chpater 6.pdfAttached File127.44 kBAdobe PDFView/Open
11 chpater 7.pdf34.53 kBAdobe PDFView/Open
12 annexure.pdf10.71 MBAdobe PDFView/Open
1 title page.pdf461.1 kBAdobe PDFView/Open
2 prilim pages.pdf1.2 MBAdobe PDFView/Open
3 content.pdf150.96 kBAdobe PDFView/Open
4 abstract.pdf9.81 kBAdobe PDFView/Open
5 chapter 1.pdf640.58 kBAdobe PDFView/Open
6 chpater 2.pdf212.26 kBAdobe PDFView/Open
7 chpater 3.pdf442.03 kBAdobe PDFView/Open
80_recommendation.pdf494.93 kBAdobe PDFView/Open
8 chpater 4.pdf249.43 kBAdobe PDFView/Open
9 chpater 5.pdf119.46 kBAdobe PDFView/Open
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