Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/570258
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dc.coverage.spatialAn investigation on multiport memory and tcam architectures in fpga for performance enhancement
dc.date.accessioned2024-06-10T09:05:58Z-
dc.date.available2024-06-10T09:05:58Z-
dc.identifier.urihttp://hdl.handle.net/10603/570258-
dc.description.abstractMultiport and Ternary Content Addressable Memory (TCAM) are used in networking applications, typically packet forwarding mechanisms. The traditional memory architectures comprise single port or dual port and can perform one or two operations simultaneously. However, multiport memory becomes necessary in systems with multiple processors requiring simultaneous memory access without conflicts. Multiport memory has several independent ports, each capable of performing read and write operations concurrently. Each port has its own set of addresses and data lines, allowing multiple processors to access different locations in memory simultaneously. TCAM is a high speed searching device that searches the entire memory parallelly in a single cycle. However, modern Field Programmable Gate Array (FPGA) do not have a built in TCAM and multiport memory, so they must be emulated using Block RAMs (BRAM) and Static Random Access Memory (SRAM) such as Lookup Table (LUT), LUTRAM and Flip Flops (FF). The emulation of TCAMs on FPGAs can significantly impact performance. Therefore, it is important to carefully consider the trade offs involved before deciding to emulate TCAMs on an FPGA. Hence, this research mainly focuses on developing a multiport memory and TCAM architecture to enhance the performance parameters such as throughput, slice utilization, power consumption and energy efficiency. The combination of multiport and TCAM can be used to create high performance systems that can handle large amounts of data quickly. newline
dc.format.extentxxi,149p.
dc.languageEnglish
dc.relationp.139-148
dc.rightsuniversity
dc.titleAn investigation on multiport memory and tcam architectures in fpga for performance enhancement
dc.title.alternative
dc.creator.researcherSridhar raj, S
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.subject.keywordfpga
dc.subject.keywordmultiport memory
dc.subject.keywordtcam architectures
dc.description.note
dc.contributor.guideShantha selvakumari, R
dc.publisher.placeChennai
dc.publisher.universityAnna University
dc.publisher.institutionFaculty of Information and Communication Engineering
dc.date.registered
dc.date.completed2024
dc.date.awarded2024
dc.format.dimensions21cm
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Faculty of Information and Communication Engineering

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01_title.pdfAttached File248.29 kBAdobe PDFView/Open
02_prelim_pages.pdf3 MBAdobe PDFView/Open
03_content.pdf203.22 kBAdobe PDFView/Open
04_abstract.pdf507.58 kBAdobe PDFView/Open
05_chapter1.pdf931.24 kBAdobe PDFView/Open
06_chapter2.pdf950.98 kBAdobe PDFView/Open
07_chapter3.pdf1.93 MBAdobe PDFView/Open
08_chapter4.pdf1.24 MBAdobe PDFView/Open
09_chapter5.pdf1.18 MBAdobe PDFView/Open
10_chapter6.pdf2.67 MBAdobe PDFView/Open
11_chapter7.pdf892.64 kBAdobe PDFView/Open
12_annexures.pdf1.96 MBAdobe PDFView/Open
80_recommendation.pdf130.99 kBAdobe PDFView/Open


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