Design and analysis of energy efficient high performance adders in integrated circuit applications

Abstract

newline The popularity of Portable power electronic devices and the high energy newlinedemand led the designers to look for devices with reduced silicon area, increased newlinefunctioning speed, battery life and reliability. The primary goal of developing newlinetechnologies is to speed up gadget performance. However, speeding up newlinetechnology causes difficulties with size, which further impairs mobility. newlineMoreover, another major problem is the power and it is very complex to attain newlineincreased power from a single device, since it is very essential to maintain a newlinebalance amid the power supply and the processor. In summarization, the main newlineproblems that a designer has to take into consideration are Delay, Area, and Power newlineconsumption. To address some challenges, Very Large Scale Integration (VLSI) is newlinefavored, with the device capable of performing computation, Arithmetic Logic newlineUnit (ALU), also known as Floating Point Unit (FPU), serving as the main brain. newlineAmong the various units, the ALU is liable for logical operations, addition, newlinemultiplication, subtraction and division. In ALU and FPU multiplier, the Adders newlineacts as main component and it is also employed in designing of filters. Therefore, newlineit is feasible to increase the speed of the devices by making the necessary newlinemodifications to the Adder circuit, which is the most widely used.