Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/564880
Title: | FPGA Implementation of Conversion of Binary to Double Base Number System DBNS using Various Search Algorithms |
Researcher: | Sinha, Satrughna |
Guide(s): | Sinha, Amitabha |
Keywords: | Computer Science Computer Science Theory and Methods Engineering and Technology |
University: | Maulana Abul Kalam Azad University of Technology |
Completed Date: | 2021 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/564880 |
Appears in Departments: | School of Engineering & Technology |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 352.49 kB | Adobe PDF | View/Open |
02_priliminary pages.pdf | 480.43 kB | Adobe PDF | View/Open | |
03_content.pdf | 601.16 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 412.82 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 430.67 kB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 617.48 kB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 535.09 kB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 1.12 MB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 522.51 kB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 346.37 kB | Adobe PDF | View/Open | |
11_annexture.pdf | 2.93 MB | Adobe PDF | View/Open | |
80_recommendation.pdf | 557.66 kB | Adobe PDF | View/Open |
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