Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/56360
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DC FieldValueLanguage
dc.coverage.spatial
dc.date.accessioned2015-12-14T09:01:48Z-
dc.date.available2015-12-14T09:01:48Z-
dc.identifier.urihttp://hdl.handle.net/10603/56360-
dc.description.abstractNone
dc.format.extentxv, 214p.
dc.languageEnglish
dc.relation
dc.rightsuniversity
dc.titleDesign and analysis of fault based test compaction methods for combinational circuits
dc.title.alternative
dc.creator.researcherThamarai, SM
dc.subject.keywordcombinational circuits
dc.subject.keywordcompaction methods
dc.subject.keyworddesign and analysis
dc.subject.keywordfault based test compaction methods
dc.description.note
dc.contributor.guideKuppusamy, K
dc.publisher.placeKaraikudi
dc.publisher.universityAlagappa University
dc.publisher.institutionDepartment of Computer Science and Engineering
dc.date.registered08/08/2009
dc.date.completed22/03/2012
dc.date.awarded11/01/2013
dc.format.dimensions
dc.format.accompanyingmaterialDVD
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:Department of Computer Science and Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File53.78 kBAdobe PDFView/Open
02_certificate.pdf9.19 kBAdobe PDFView/Open
03_acknowledgement.pdf30.06 kBAdobe PDFView/Open
04_contents.pdf26.84 kBAdobe PDFView/Open
05_list of tables.pdf16.07 kBAdobe PDFView/Open
06_abbreviations.pdf16.57 kBAdobe PDFView/Open
07_chapter 1.pdf39.56 kBAdobe PDFView/Open
08_chapter 2.pdf142.49 kBAdobe PDFView/Open
09_chapter 3.pdf171.82 kBAdobe PDFView/Open
10_chapter 4.pdf112.05 kBAdobe PDFView/Open
11_chapter 5.pdf84.96 kBAdobe PDFView/Open
12_chapter 6.pdf74.34 kBAdobe PDFView/Open
13_chapter 7.pdf662.69 kBAdobe PDFView/Open
14_chapter 8.pdf667.51 kBAdobe PDFView/Open
15_chapter 9.pdf27.14 kBAdobe PDFView/Open
16_references.pdf70.92 kBAdobe PDFView/Open
17_appendix.pdf1.53 MBAdobe PDFView/Open


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