Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/562994
Title: Performance Evaluation of on chip Interconnection Topologies for multi cores systems
Researcher: Gautam, Savita
Guide(s): Umar, M. Sarosh and Samad, Abdus
Keywords: Computer Science
Computer Science Hardware and Architecture
Engineering and Technology
Interconnects (Integrated circuit technology)
University: Aligarh Muslim University
Completed Date: 2023
Abstract: newline
Pagination: 225p.
URI: http://hdl.handle.net/10603/562994
Appears in Departments:Department of Computer Engineering

Files in This Item:
File Description SizeFormat 
01 title_page.pdfAttached File55.92 kBAdobe PDFView/Open
02 prelim pages.pdf340.32 kBAdobe PDFView/Open
03 contents.pdf163.73 kBAdobe PDFView/Open
04 abstract.pdf351.09 kBAdobe PDFView/Open
05 chapter 1.pdf299.2 kBAdobe PDFView/Open
06 chapter 2.pdf2.48 MBAdobe PDFView/Open
07 chapter 3.pdf799.06 kBAdobe PDFView/Open
08 chapter 4.pdf1.55 MBAdobe PDFView/Open
09 chapter 5.pdf823.97 kBAdobe PDFView/Open
10 chapter 6.pdf110.96 kBAdobe PDFView/Open
11 annexures.pdf224.85 kBAdobe PDFView/Open
80_recommendation.pdf165.96 kBAdobe PDFView/Open
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