Design Optimization of CMOS Oscillator Circuits for Low Power Applications

Abstract

The increasing need for high data rates motivates the industry toward high speed and newlinelow power systems to meet the newest specifications while remaining compatible with newlineprevious standards. Modern wireless communication devices based on integrated circuit technology are portable that require low power and high performance. Low voltage and low power operations are required for these devices to ensure reliable operation and avoid overheating. Voltage-controlled oscillator (VCO) is the core of all wired and wireless communication systems, including phase-lock-loop (PLL), delay-locked loop (DLL), and frequency synthesizers. The advantages of CMOS-based circuits are the low power consumption and small size. This work presents several low-power ring VCO designs to improve the performance of the conventional VCO. The VCO designs are optimized for low power dissipation, and the performance parameters like frequency range and phase noise have been achieved in 90 nm and 180 nm CMOS technology. Various ring oscillator designs and architectures newlineare reviewed, and the performance is summarized and compared. A three-stage widebandwidth low-power VCO design is proposed using a multi-pass loop complementary current control mechanism and inversion mode MOS varactor with two PMOS transistors. A multi-pass loop is used to decrease the delay time of each stage by introducing a pair of secondary inputs to the individual stage and swapping these secondary inputs prior to the primary inputs. Complementary current control delivers an additional current to eliminate the low control voltage operation and enhance the operating frequency. This VCO shows output frequency variations from 5.46 GHz to 6.37 GHz with a constant power dissipation of 0.96 mW for control voltage variations with IMOS varactor width of 5 and#956;m. The results are extended for the IMOS width of 10 and#956;m, 15 and#956;m, and 20 and#956;m. The phase noise of this VCO is -93.4 dBc/Hzat1 MHz frequency offset, and the figure of merit (FoM) is -172.8 dBc/Hz for source/drain voltage tuning.