Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/562654
Title: | Design and Analysis of Radiation Hardened SRAM Cell for Space Applications |
Researcher: | Pavan Kumar, Mukku |
Guide(s): | Rohit, Lorenzo |
Keywords: | Critical Charge, Process Error Correction Code (ECC) process |
University: | Vellore Institute of Technology (VIT-AP) |
Completed Date: | 2024 |
Abstract: | SRAM memory accounts for a considerable part in System-on-Chip (SoC). Consequently, newlinephysical designers endeavor to minimize the dimensions of transistors in SRAM cells to newlineenhance the density of the memory circuits in SoC. Reducing the size of transistors is ex- newlinetremely susceptible to fluctuations in threshold voltage and soft error upset probability. During the last thirty years, several methods for mitigating soft errors have been presented. Among these approaches, the Radiation Hardened By Design (RHBD) method was widely favored since newlineit is easily verify upset analysis by using CMOS foundry. newlineThis dissertation aims to examine the issues of high energy radiation particles impact on newlinememory cell storage nodes by using a double exponential current source model. Furthermore,existing radiation-resistant memory cells suffer from a charge sharing issue and a trade-off between the memory cell s performance and its capacity to withstand disruptions. To mitigate newlinethe issue of Single Event Upset (SEU), we have designed some radiation-hardened SRAM newlinecells that provides a compact size and reliable performance. Subsequently, a 14T SRAM cell with robust error tolerance against soft errors is developed. This cell effectively prevents double node upset and maintains good performance even in the most challenging Process, Voltage, newlineand Temperature conditions (PVT). Moreover, the soft error probability is assessed to endure the incidence of Single Event Multiple Node Upset (SEMNU). Ultimately, we have suggested an additional 12T memory cell that resistant from upset caused by charge sharing between the two closest vulnerable nodes when they are affected by a high-energy particle assault. newlineWe conducted a thorough examination and comparison of several performance parameters, newlineincluding stability, access time, and power consumption between the existed 6T SRAM with newlineError Correcting Code (ECC) and our proposed SEUH-12T design. The findings demonstrate newlinethat the SEUH-12T, as suggested, exhibits better access time, decreased power consumpti |
Pagination: | xiv,156 |
URI: | http://hdl.handle.net/10603/562654 |
Appears in Departments: | Department of Electronics Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
10. chapter 6.pdf | Attached File | 2.18 MB | Adobe PDF | View/Open |
11. chapter 7.pdf | 2.34 MB | Adobe PDF | View/Open | |
12. chapter 8.pdf | 1.08 MB | Adobe PDF | View/Open | |
1. title.pdf | 88 kB | Adobe PDF | View/Open | |
2. prelim pages.pdf | 1.2 MB | Adobe PDF | View/Open | |
3. contents.pdf | 2.39 MB | Adobe PDF | View/Open | |
4. abstract.pdf | 71.64 kB | Adobe PDF | View/Open | |
5. chapter 1.pdf | 537.17 kB | Adobe PDF | View/Open | |
6. chapter 2.pdf | 4.64 MB | Adobe PDF | View/Open | |
7. chapter 3.pdf | 2.13 MB | Adobe PDF | View/Open | |
80_recommendation.pdf | 986.12 kB | Adobe PDF | View/Open | |
8. chpater 4.pdf | 407.01 kB | Adobe PDF | View/Open | |
9. chapter 5.pdf | 996.32 kB | Adobe PDF | View/Open | |
annexures.pdf | 10.02 MB | Adobe PDF | View/Open |
Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).
Altmetric Badge: