Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/556804
| Title: | Logic synthesis and verification of advance digital circuits in next generation cyber physical systems |
| Researcher: | Kumar, Jitendra |
| Guide(s): | Srivastava, Asutosh |
| Keywords: | Computer Science Cybernetics Generation cyber physical systems Verification of advance digital circuits |
| University: | Jawaharlal Nehru University |
| Completed Date: | 2022 |
| Abstract: | newline |
| Pagination: | ix, 209 |
| URI: | http://hdl.handle.net/10603/556804 |
| Appears in Departments: | School of Computer and System Science |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 01_title page.pdf | Attached File | 364.51 kB | Adobe PDF | View/Open |
| 02_preliminary pages.pdf | 1.02 MB | Adobe PDF | View/Open | |
| 03_contents.pdf | 329.84 kB | Adobe PDF | View/Open | |
| 04_abstract.pdf | 462.03 kB | Adobe PDF | View/Open | |
| 05_chapter1.pdf | 1.56 MB | Adobe PDF | View/Open | |
| 06_chapter2.pdf | 4.6 MB | Adobe PDF | View/Open | |
| 07_chapter3.pdf | 2.75 MB | Adobe PDF | View/Open | |
| 08_chapter4.pdf | 4.43 MB | Adobe PDF | View/Open | |
| 09_chapter5.pdf | 2.51 MB | Adobe PDF | View/Open | |
| 10_references.pdf | 1.38 MB | Adobe PDF | View/Open | |
| 80_recommendation.pdf | 776.54 kB | Adobe PDF | View/Open |
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