Optimized DNN Architecture for Vision Based Applications on Embedded Platforms

Abstract

Deep Neural Networks (DNNs) have demonstrated exceptional performance across newlinevarious domains, particularly in image and computer vision tasks. DNN algorithms newlineinvolve powerful multilevel feature extractions resulting in an extensive range of newlineparameters and memory footprints. However, their extensive range of parameters newlineand memory footprints pose challenges when deploying these models on resourceconstrained newlineembedded platforms for real time applications. We present a comprehensive newlinestudy on model optimization techniques aimed at addressing memory bandwidth newlinerequirements, memory footprint, and power consumption for efficient DNN deployment newlineon embedded platforms. newlineWe explore the key issues associated with DNN model deployment on resource newlineconstrained devices, highlighting the importance of memory efficiency and energy newlineconsumption. We conduct a survey of various DNN models which can be ported newlineon to embedded platform using ImageNet dataset. MobileNet architecture proves to newlinebe the best compared to all the current DNN architectures for porting on to edge newlinedevices. We make a survey of model optimization methods, including model optimization newlinetechniques such as quantization, and pruning, which significantly reduce newlinememory requirements without compromising on the performance. In addition to the newlinemodel optimization, the dissertation delves into the design of efficient architectures newlinespecifically tailored for embedded platforms. Techniques such as lightweight network newlinearchitectures, depth-wise separable convolutions, and model parallelism are investigated newlineto reduce computation and memory demands. Moreover, hardware acceleration newlineapproaches are explored to leverage specialized hardware units for efficient DNN computations, newline newline