Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/546734
Title: Modelling and Design of Neutral Point Clamped Inverter for Mitigating Low Harmonics Ripple Case Study for Over Modulation Mode
Researcher: Bharat Modi
Guide(s): Mahendra Lalwani
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Rajasthan Technical University, Kota
Completed Date: 2023
Abstract: Over modulation phenomenon has been investigated through several PWM (Pulse Width Modulation) techniques in NPC (Neutral Point Clamp Inverter). However, due to non- linear characteristics and a severe low harmonics ripples, it has not been used in closed-loop control. Nevertheless, the over-modulation index, m1:15, can be achieved by injection of the third harmonic in STPWM (sine triangle pulse width modulation) without pulse dropping. The inverter has to work in over modulation region to utilize the maximum DC bus voltage is require reduction in the low harmonic ripple. For the reduction of THD (Total Harmonics Distortions), grid contributes to supply as AHF(Active Harmonics Filter) used and the modulation index is taken more than 1.15. After doing the investigation on several PWM techniques, it is concluded that STPWM with third harmonic injection is more suitable with specified modulation indexes. newline newlineIt has been observed that low-frequency harmonics get generated in over- modulation region due to pulse dropping. If friendly harmonics get injected (which are opposite in polarity with low harmonic and are in the same polarity with fundamental frequency) in the system, then these low harmonic can get eliminated with higher modulation index. A compensator in the present work has been designed that is connected to the NPC inverter. In this compensator, simple clipping circuits with grid and DC sources are used. This compensator has two tasks. First, to detect the low order harmonics and second to add desired friendly harmonics. The performance of the compensator gets verified by simulation results and mathematical models analysis, shown in further sections of this thesis. The additional advantages of this compensator are the maximum utilization of DC bus voltage during the mismatch of the grid and the solar inverter output voltages. newline newline
Pagination: 32.6 mb
URI: http://hdl.handle.net/10603/546734
Appears in Departments:Electrical Engineering

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80_recommendation.pdfAttached File192.52 kBAdobe PDFView/Open
abstract.pdf483.95 kBAdobe PDFView/Open
annexures.pdf7.81 MBAdobe PDFView/Open
chapter-1.pdf3.16 MBAdobe PDFView/Open
chapter-2.pdf8.31 MBAdobe PDFView/Open
chapter-3.pdf4.09 MBAdobe PDFView/Open
chapter-4.pdf945.85 kBAdobe PDFView/Open
chapter-5.pdf2.15 MBAdobe PDFView/Open
chapter-6.pdf2.02 MBAdobe PDFView/Open
chapter-7.pdf5.58 MBAdobe PDFView/Open
chapter-8.pdf1.79 MBAdobe PDFView/Open
contents.pdf657.25 kBAdobe PDFView/Open
prelim pages.pdf3.38 MBAdobe PDFView/Open
title.pdf126.07 kBAdobe PDFView/Open
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