Design of an algorithm to minimize speculative parallelism overhead in simultaneous multithreading on multicore chip architecture

Abstract

Efficient software leveraging parallel architectures is crucial for optimal execution across multiple cores. Achieving this efficiency is challenging with automatic parallelization. Speculative parallelism offers an alternative by dividing sequential workloads into implicit threads for separate core execution, assuming no dependencies. Mis-speculation requires corrective action. Despite its benefits, this technique comes with various overheads that must be tackled. This research proposes two architectural frameworks, Efficient Speculative Parallelism Architectural Framework (ESPAF) and Novel Dependency Resolution Aware Framework (NDRAF), along with their corresponding algorithms, which aim to tackle overheads associated with speculative parallelization implementation. The ESPAF converts sequential workload into multi-threaded code efficiently, but it has a limitation in handling all types of loop dependencies. The NDRAF is specifically designed to address this issue and outperforms ESPAF in terms of performance gain. Hardware Transactional Memory (HTM) is utilized for hardware architectural support to handle data violations. To evaluate compatibility and scalability, four different versions of HTMs were integrated with ESPAF and NDRAF. Both architectural frameworks were implemented using the LLVM compiler infrastructure and evaluated on the Intel(R) Core(TM) i5-7400 CPU, using the SPEC2006 and SPEC2017 benchmark suites. The study found that NDRAF outperforms ESPAF, with a 1.81x computational speedup and 2.11x performance gain with NDRAF with hardware support. The Eager/Lazy/Timestamp (EL_T) HTM exhibits the best performance as the thread count rises. The results indicated that the proposed architectures, and algorithms with their hardware supports effectively minimized overhead, resulting in better performance compared to sequential algorithms. newline