Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/540608
Title: | An Efficient FPGA Architectures for Blind Source Separation |
Researcher: | Ezilarasan M R |
Guide(s): | J Britto Pari |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Vel Tech Rangarajan Dr.Sagunthala RandD Institute of Science and Technology |
Completed Date: | 2024 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/540608 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
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10.ezilarasan m r vtd 607_chapter 1.pdf | Attached File | 149.44 kB | Adobe PDF | View/Open |
11.ezilarasan m r vtd 607_chapter 2.pdf | 209.19 kB | Adobe PDF | View/Open | |
12.ezilarasan m r vtd 607_chapter 3.pdf | 1.28 MB | Adobe PDF | View/Open | |
13.ezilarasan m r vtd 607_chapter 4.pdf | 976.79 kB | Adobe PDF | View/Open | |
14.ezilarasan m r vtd 607_chapter 5.pdf | 442.45 kB | Adobe PDF | View/Open | |
15.ezilarasan m r vtd 607_chapter 6.pdf | 135.18 kB | Adobe PDF | View/Open | |
17.ezilarasan m r vtd 607_list of publication.pdf | 105.3 kB | Adobe PDF | View/Open | |
18.ezilarasan m r vtd 607_curriculum vitae.pdf | 4.41 kB | Adobe PDF | View/Open | |
1.ezilarasan m r vtd 607_front page.pdf | 13.25 kB | Adobe PDF | View/Open | |
2.ezilarasan m r vtd 607_bonafide.pdf | 102.91 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 106.47 kB | Adobe PDF | View/Open |
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