Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/540198
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dc.coverage.spatial
dc.date.accessioned2024-01-17T09:04:00Z-
dc.date.available2024-01-17T09:04:00Z-
dc.identifier.urihttp://hdl.handle.net/10603/540198-
dc.description.abstractAbstract Included newline
dc.format.extentxv, 105p
dc.languageEnglish
dc.relation93
dc.rightsuniversity
dc.titlePerformance Analysis of Binary Adders and Multipliers for Signal Processing applications
dc.title.alternative
dc.creator.researcherRadhakrishnan S
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.notereferences 95-102p Appendix 103-105p
dc.contributor.guideRakesh Kumar Karn
dc.publisher.placeThanjavur
dc.publisher.universitySASTRA University
dc.publisher.institutionSchool of Electrical and Electronics Engineering
dc.date.registered2014
dc.date.completed2023
dc.date.awarded2023
dc.format.dimensions28 cm
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:School of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File68.88 kBAdobe PDFView/Open
02_prelim.pdf2.47 MBAdobe PDFView/Open
03_table of contents.pdf94.15 kBAdobe PDFView/Open
04._abstract.pdf84.18 kBAdobe PDFView/Open
05_ chapter_01.pdf1.29 MBAdobe PDFView/Open
06 _ chapter_02.pdf2.25 MBAdobe PDFView/Open
07_ chapter_03.pdf4.47 MBAdobe PDFView/Open
08_ chapter_04.pdf10.03 MBAdobe PDFView/Open
09_ chapter_05.pdf700.46 kBAdobe PDFView/Open
10_ chapter_06.pdf16.63 MBAdobe PDFView/Open
11_ annexure.pdf104.87 kBAdobe PDFView/Open
80_recommendation.pdf89.95 kBAdobe PDFView/Open


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