Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/540198
Title: Performance Analysis of Binary Adders and Multipliers for Signal Processing applications
Researcher: Radhakrishnan S
Guide(s): Rakesh Kumar Karn
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: SASTRA University
Completed Date: 2023
Abstract: Abstract Included newline
Pagination: xv, 105p
URI: http://hdl.handle.net/10603/540198
Appears in Departments:School of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File68.88 kBAdobe PDFView/Open
02_prelim.pdf2.47 MBAdobe PDFView/Open
03_table of contents.pdf94.15 kBAdobe PDFView/Open
04._abstract.pdf84.18 kBAdobe PDFView/Open
05_ chapter_01.pdf1.29 MBAdobe PDFView/Open
06 _ chapter_02.pdf2.25 MBAdobe PDFView/Open
07_ chapter_03.pdf4.47 MBAdobe PDFView/Open
08_ chapter_04.pdf10.03 MBAdobe PDFView/Open
09_ chapter_05.pdf700.46 kBAdobe PDFView/Open
10_ chapter_06.pdf16.63 MBAdobe PDFView/Open
11_ annexure.pdf104.87 kBAdobe PDFView/Open
80_recommendation.pdf89.95 kBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: