Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/538926
Title: | VLSI Design of Low Power and High Speed Arithmetic Circuit with Built In Memory System |
Researcher: | Nirmalraj T |
Guide(s): | Rakesh Kumar Karn |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic VLS subsystems |
University: | SASTRA University |
Completed Date: | 2023 |
Abstract: | Abstract Included newline |
Pagination: | xiv, 103p |
URI: | http://hdl.handle.net/10603/538926 |
Appears in Departments: | School of Electrical and Electronics Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_ title.pdf | Attached File | 4.72 kB | Adobe PDF | View/Open |
02_ prelim.pdf | 126.18 kB | Adobe PDF | View/Open | |
03_table of contents.pdf | 132.68 kB | Adobe PDF | View/Open | |
04_ abstract.pdf | 74.4 kB | Adobe PDF | View/Open | |
05_ chapter_01.pdf | 263.41 kB | Adobe PDF | View/Open | |
06_ chapter _02.pdf | 228.56 kB | Adobe PDF | View/Open | |
07_chapter_03.pdf | 549 kB | Adobe PDF | View/Open | |
08_ chapter_04.pdf | 315.97 kB | Adobe PDF | View/Open | |
09_ chapter_05.pdf | 213.06 kB | Adobe PDF | View/Open | |
10_ chapter_06.pdf | 467.68 kB | Adobe PDF | View/Open | |
11_ chapter_07.pdf | 489.16 kB | Adobe PDF | View/Open | |
12_ annexure.pdf | 144.16 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 85.72 kB | Adobe PDF | View/Open |
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