Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/538926
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dc.coverage.spatial
dc.date.accessioned2024-01-11T04:45:28Z-
dc.date.available2024-01-11T04:45:28Z-
dc.identifier.urihttp://hdl.handle.net/10603/538926-
dc.description.abstractAbstract Included newline
dc.format.extentxiv, 103p
dc.languageEnglish
dc.relation129
dc.rightsuniversity
dc.titleVLSI Design of Low Power and High Speed Arithmetic Circuit with Built In Memory System
dc.title.alternative
dc.creator.researcherNirmalraj T
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.subject.keywordVLS subsystems
dc.description.noteReferences 91-100p Appendix 102-103p
dc.contributor.guideRakesh Kumar Karn
dc.publisher.placeThanjavur
dc.publisher.universitySASTRA University
dc.publisher.institutionSchool of Electrical and Electronics Engineering
dc.date.registered2012
dc.date.completed2023
dc.date.awarded2023
dc.format.dimensions28 cm
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:School of Electrical and Electronics Engineering

Files in This Item:
File Description SizeFormat 
01_ title.pdfAttached File4.72 kBAdobe PDFView/Open
02_ prelim.pdf126.18 kBAdobe PDFView/Open
03_table of contents.pdf132.68 kBAdobe PDFView/Open
04_ abstract.pdf74.4 kBAdobe PDFView/Open
05_ chapter_01.pdf263.41 kBAdobe PDFView/Open
06_ chapter _02.pdf228.56 kBAdobe PDFView/Open
07_chapter_03.pdf549 kBAdobe PDFView/Open
08_ chapter_04.pdf315.97 kBAdobe PDFView/Open
09_ chapter_05.pdf213.06 kBAdobe PDFView/Open
10_ chapter_06.pdf467.68 kBAdobe PDFView/Open
11_ chapter_07.pdf489.16 kBAdobe PDFView/Open
12_ annexure.pdf144.16 kBAdobe PDFView/Open
80_recommendation.pdf85.72 kBAdobe PDFView/Open


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