1. Shodhganga@INFLIBNET
  2. Jaypee Institute of Information Technology
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/527709
Title: Design and Performance Investigation of Gate/Channel Engineered Gate All Around Field Effect Transistor
Researcher: Narula, Mandeep Singh
Guide(s): Pandey, Archana
Keywords: DIBL,
Dual Gate,
Engineering
Engineering and Technology
Engineering Electrical and Electronic
Gate All Around,
Gate Engineering
Short Channel Effects,
University: Jaypee Institute of Information Technology
Completed Date: 2023
Abstract: included newline
Pagination: xxi, 150p., Synopsis-22
URI: http://hdl.handle.net/10603/527709
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title.pdfAttached File318.48 kBAdobe PDFView/Open
02_prelim pages.pdf231.76 kBAdobe PDFView/Open
03_table of contents.pdf260.15 kBAdobe PDFView/Open
04_abstract.pdf230.27 kBAdobe PDFView/Open
05_chapter1.pdf1.71 MBAdobe PDFView/Open
06_chapter2.pdf3.9 MBAdobe PDFView/Open
07_chapter3.pdf2.3 MBAdobe PDFView/Open
08_chapter4.pdf1.08 MBAdobe PDFView/Open
09_chapter5.pdf1.15 MBAdobe PDFView/Open
10_chapter6.pdf1.91 MBAdobe PDFView/Open
11_references.pdf290.77 kBAdobe PDFView/Open
12_list of publications.pdf302.79 kBAdobe PDFView/Open
13_synopsis.pdf833.41 kBAdobe PDFView/Open
80_recommendation.pdf625.39 kBAdobe PDFView/Open
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