Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/526102
Title: Investigation on Grid Synchronization Techniques of Grid tied Solar PV System using Pre Filter based Phase Locked Loop
Researcher: Sridharan, K
Guide(s): Chitti Babu, B
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Indian Institute of Information Technology Design and Manufacturing Kancheepuram
Completed Date: 2023
Abstract: In the current scenario, the integration of solar photovoltaic (PV) system with variable power production into power grids requires a power converter with robust control techniques. In order to formulate the control strategy meticulously, fast and accurate detection of grid phase angle is necessary. Hence, the frequency and phase angle of the grid voltages are vital components to guarantee the synchronization of the grid connected converter. Additionally, a phase locked loop (PLL) based control algorithm is needed to generate the accurate reference current for the grid-connected converter. PLL is mandatory to track the frequency, and phase angle and filter out the harmonics, interharmonics, and DC offset during distorted grid conditions. This thesis proposes a modified sliding Goertzel discrete Fourier transform (SGDFT) based PLL and an adaptive band-pass filter (ABPF) based PLL to extract the fundamental component during distorted grid conditions. The modified SGDFT based PLL is designed using three degrees of freedom (DOF) of second-order fraction delay using the Lagrange interpolation method to alleviate the integer and noninteger frequency components and strong against several distorted grid conditions, namely, voltage sag, high-frequency harmonics, interharmonics, and DC offset. Furthermore, the proposed PLL precisely extracts the fundamental frequency and phase angle with the faster transient response and attains superior system stability. The detailed mathematical modeling of recommended PLL is analyzed with existing PLLs, such as harmonic, interharmonic, and DC offset PLL (HIHDO PLL), hybrid prefiltering stage PLL (HPFS PLL), and SGDFT-based PLL.
Pagination: xv, 147
URI: http://hdl.handle.net/10603/526102
Appears in Departments:Electrical and Electronics Engineering

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01_title.pdfAttached File73.47 kBAdobe PDFView/Open
02_prelim pages.pdf174.8 kBAdobe PDFView/Open
03_contents.pdf80.81 kBAdobe PDFView/Open
04_abstract.pdf59.73 kBAdobe PDFView/Open
05_chapter1.pdf1.56 MBAdobe PDFView/Open
06_chapter2.pdf4.39 MBAdobe PDFView/Open
07_chapter3.pdf6.91 MBAdobe PDFView/Open
08_chapter4.pdf7.3 MBAdobe PDFView/Open
09_chapter5.pdf62.65 kBAdobe PDFView/Open
10_annexures.pdf112.61 kBAdobe PDFView/Open
80_recommendation.pdf93.32 kBAdobe PDFView/Open
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