Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/524769
Title: Tunnel FET Based Topologies for Low Power Digital and Analog Circuits
Researcher: Jha, Kamal Kishor
Guide(s): Pattanaik, Manisha
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Atal Bihari Vajpayee Indian Institute of Information Technology and Management
Completed Date: 2015
Abstract: Attached
Pagination: xix,127p.
URI: http://hdl.handle.net/10603/524769
Appears in Departments:Department of Electrical and Electronics Engineering

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File Description SizeFormat 
01_title.pdfAttached File97.6 kBAdobe PDFView/Open
02_prelim pages.pdf287.35 kBAdobe PDFView/Open
03_content.pdf133.95 kBAdobe PDFView/Open
04_abstract.pdf143.44 kBAdobe PDFView/Open
05_chapter 1.pdf1.61 MBAdobe PDFView/Open
06_chapter 2.pdf518.02 kBAdobe PDFView/Open
07_chapter 3.pdf456.76 kBAdobe PDFView/Open
08_chapter 4.pdf805.46 kBAdobe PDFView/Open
09_chapter 5.pdf881.28 kBAdobe PDFView/Open
10_chapter 6.pdf545.21 kBAdobe PDFView/Open
11_annexures.pdf142.48 kBAdobe PDFView/Open
80_recommendation.pdf117.06 kBAdobe PDFView/Open
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