Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/524768
Title: Nanoscale Design Techniques for Process Variation Aware SRAM
Researcher: Yadav, Nandakishor
Guide(s): Sharma, G K and Pattanaik, M
Keywords: Computer Science
Computer Science Information Systems
Engineering and Technology
University: Atal Bihari Vajpayee Indian Institute of Information Technology and Management
Completed Date: 2015
Abstract: Attached newline
Pagination: xxiv,206p.
URI: http://hdl.handle.net/10603/524768
Appears in Departments:Department of Information Technology

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01_title.pdfAttached File73.39 kBAdobe PDFView/Open
02_prelim pages.pdf141.11 kBAdobe PDFView/Open
03_content.pdf44.04 kBAdobe PDFView/Open
04_abstract.pdf54.21 kBAdobe PDFView/Open
05_chapter 1.pdf533.43 kBAdobe PDFView/Open
06_chapter 2.pdf370.98 kBAdobe PDFView/Open
07_chapter 3.pdf663.29 kBAdobe PDFView/Open
08_chapter 4.pdf536.08 kBAdobe PDFView/Open
09_chapter 5.pdf2.41 MBAdobe PDFView/Open
10_chapter 6.pdf910.77 kBAdobe PDFView/Open
11_annexure.pdf159.31 kBAdobe PDFView/Open
80_recommendation.pdf48.04 kBAdobe PDFView/Open
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