Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/522928
Title: | Automating UVM Based Functional And Design Verification For SOC Using Intelligent Algorithm |
Researcher: | N. Bhuvaneswary |
Guide(s): | J. Deny |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Kalasalingam University |
Completed Date: | 2023 |
Abstract: | newline |
Pagination: | |
URI: | http://hdl.handle.net/10603/522928 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
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01_title.pdf.pdf | Attached File | 28.93 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 1.64 MB | Adobe PDF | View/Open | |
03_content.pdf | 40.28 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 99.82 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 195.34 kB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 223.1 kB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 441.54 kB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 219.44 kB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 320.51 kB | Adobe PDF | View/Open | |
10_annexures.pdf | 206.08 kB | Adobe PDF | View/Open | |
11_chapter 6.pdf | 639.97 kB | Adobe PDF | View/Open | |
12_chapter 7.pdf | 133.81 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 157.16 kB | Adobe PDF | View/Open |
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