Investigations on performance of efficient adders in filter design for signal and image processing requirements

Abstract

Arithmetic and logic units are an absolute necessity in order to carry out most of the filtering process utilized for medical imaging, remote sensing and optical communication. Logic gate based parallel prefix addition is an important operation in such filtering. Although a substantial amount of research has been done in this area, the majority of attempts have not dealt with these gates as a joint design and operation approach. This is despite the fact that the topic has been studied for a significant amount of time and done in a different way. This practice results in an inability to react to changing situations and the disposal of hardware that was not necessary. In recent years, parallel prefix full adders have been adopted as the major building block for various filtering applications. This trend is expected to continue interferometrically, either as a single unit or in a pair of complementary units. The next option has restricted reconfigurability unless significant adjustments are made to the architectural design of addition logic and the conditions in which it will be driven. newline