Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/518612
Title: Analysis Of Modified Radix22 SRFFT Architecture With Digital Filters For Noise Suppression In Digital Hearing Aids
Researcher: RAMESH KUMAR
Guide(s): Chitra M P
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Sathyabama Institute of Science and Technology
Completed Date: 2022
Abstract: Feedback noise is the most recurrent issue with the available newlineDigital Hearing Aids (DHAs). Recent years have witnessed several newlineattempts to bring down feedback noise. In DHA, two essential blocks to newlineimplement in DSP are Fast Fourier Transform (FFT) and Digital Filters. newlineIn DSP and communication systems, FFT is a significant building block. newlineFFT is an efficient algorithm that implements Discrete Fourier newlineTransform (DFT). Owing to Twiddle factor multiplication, conventional newlineFFT encompass large chip area and delay. Therefore, in order to get rid newlineof the disadvantages of the conventional FFT, pipelined FFT is chosen. newlineWith a view to bring down feedback noise in DHAs, the potential of the newlineR22 Single-path Delay Feedback (R22SDF) FFT architecture to convert newlinediscrete time to frequency has been exploited. A high-pitched tone is newlinecaused to develop due to the acoustic feedback in hearing aid. However, newlinethe 64-point Pipelined R22SDF FFT Processor brings down such noise. newlineUsually, for low-power FFT processors, Split Radix FFT processor is newlineprimarily used, which requires fewer mathematical operations. While in newlinethe traditional sense, FFT requires greater area and power, the proposed newlineRadix-22 SDF SRFFT approach with Modified New Distributed newlineArithmetic (MNEDA) algorithm consumes lesser power. In order to newlineresolve the area complexity and delay, in the proposed filter, Carry Save newlineAccumulation (CSA) is used in place of the conventional shift and newlineaccumulation for adding up the inner partial product. Using a fast bit newlineclock for CSA has allowed for comparatively lesser power consumption. newlineThe Wiener filter assesses the realized Wiener gain prior and after the newlinefiltering function. Conventionally, measuring Signal-to-Noise Ratio newlinex newline(SNR) helps mitigate background noise. On the alternative, a new newlinemechanism for bringing down feedback noise is Gain-altered Wiener newlineFilter. In the proposed Modified Noise Reduction Strategy, the merits of newlinea Wiener filter in combination with the advantages of a decisiondirected newlineapproach and a twin-stage noise suppression
Pagination: vii, 155
URI: http://hdl.handle.net/10603/518612
Appears in Departments:ELECTRONICS DEPARTMENT

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11.chapter 7.pdf15.49 kBAdobe PDFView/Open
12.annexure.pdf4.2 MBAdobe PDFView/Open
1.title.pdf26.33 kBAdobe PDFView/Open
2.prelim pages.pdf915.05 kBAdobe PDFView/Open
3.abstract.pdf13.41 kBAdobe PDFView/Open
4.contents.pdf170.15 kBAdobe PDFView/Open
5.chapter 1.pdf774.89 kBAdobe PDFView/Open
6.chapter 2.pdf257.9 kBAdobe PDFView/Open
7.chapter 3.pdf675.51 kBAdobe PDFView/Open
80_recommendation.pdf26.33 kBAdobe PDFView/Open
8.chapter 4.pdf860.35 kBAdobe PDFView/Open
9.chapter 5.pdf466.49 kBAdobe PDFView/Open
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