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http://hdl.handle.net/10603/517398
Title: | Design And Development Of An Artificial Inspired Search Algorithm For Fault Diagnosis Of Electronic Circuits And Its Applications |
Researcher: | BINU D |
Guide(s): | Dr. Kariyappa B.S |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | Visvesvaraya Technological University, Belagavi |
Completed Date: | 2023 |
Abstract: | Analog circuits play a vital role in electronic circuits and the unexpected circuit failures would cause serious faults, leading to high-expensive repair. Thus, circuit failures remain as an open challenge as the fault diagnosis is initiated in the analog circuits only upon the occurrence of faults. Hence, fault detection is essential to detect the faults in the circuits after the occurrence but reduces huge losses. On the other hand, the isolation methods play a major role in isolating the faulty component from damaging the entire circuit. Additionally, the fault prediction approaches enable the detection of the faults prior to their occurrence and pave way for the alleviation of the faults. Therefore, the attractive domain for the identification of the faults is the prognostic approach as it guarantees the prevention of the failures by prior detection. newlineAccordingly, this research contributes methods for fault detection, fault isolation, and fault prediction of analog circuits. In fault detection, the Rider Neural Network (RideNN) is developed with the integration of the proposed Rider Optimization Algorithm (ROA) in the neural network, which engages in the detection of the component faults based on the fault dictionary and Bhattacharya distance. The proposed ROA is developed based on a new idea of fictional computing that follows imaginary thoughts and reasoning, which is distinct from nature-inspired and artificial algorithms. It is a novel algorithm that considers the characteristics of four groups of riders and is applicable in all kinds of engineering applications. In the fault isolation, the Multi-Rider Optimization-based Neural Network ( ) is developed for which the output response of the circuit components is collected, normalized, and Probabilistic Principal Component Analysis (PPCA) based dimensionally-reduction. The newly devised Deep Rider Long Short Term Memory (DeepRiderLSTM) based fault prediction integrates deep LSTM classifier with Rider Adam Algorithm (RAA) such that the fault prediction of the |
Pagination: | |
URI: | http://hdl.handle.net/10603/517398 |
Appears in Departments: | R V College of Engineering |
Files in This Item:
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10.pdf | Attached File | 155.23 kB | Adobe PDF | View/Open |
2.pdf | 336.35 kB | Adobe PDF | View/Open | |
3.pdf | 92.65 kB | Adobe PDF | View/Open | |
5.pdf | 154.73 kB | Adobe PDF | View/Open | |
6.pdf | 193.89 kB | Adobe PDF | View/Open | |
7.pdf | 381.97 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 107.66 kB | Adobe PDF | View/Open | |
8.pdf | 1.33 MB | Adobe PDF | View/Open | |
9.pdf | 1.87 MB | Adobe PDF | View/Open | |
title.pdf | 76.66 kB | Adobe PDF | View/Open |
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