Shodhganga : a reservoir of Indian theses @ INFLIBNET
The Shodhganga@INFLIBNET Centre provides a platform for research students to deposit their Ph.D. theses and make it available to the entire scholarly community in open access.
Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/517090
| Title: | Power reduction methodologies for Testing low power VLSI circuits |
| Researcher: | WARADE NILIMA SATISH |
| Guide(s): | Ravi T |
| Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
| University: | Sathyabama Institute of Science and Technology |
| Completed Date: | 2021 |
| Pagination: | vi, 138 |
| URI: | http://hdl.handle.net/10603/517090 |
| Appears in Departments: | ELECTRONICS DEPARTMENT |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 10.chapter 6.pdf | Attached File | 131.11 kB | Adobe PDF | View/Open |
| 11.annexure.pdf | 1.76 MB | Adobe PDF | View/Open | |
| 1.title.pdf | 19.39 kB | Adobe PDF | View/Open | |
| 2.prelim pages.pdf | 944.33 kB | Adobe PDF | View/Open | |
| 3.abstract.pdf | 11.87 kB | Adobe PDF | View/Open | |
| 4.contents.pdf | 154.61 kB | Adobe PDF | View/Open | |
| 5.chapter 1.pdf | 223.21 kB | Adobe PDF | View/Open | |
| 6.chapter 2.pdf | 244.83 kB | Adobe PDF | View/Open | |
| 7.chapter 3.pdf | 1.09 MB | Adobe PDF | View/Open | |
| 80_recommendation.pdf | 19.39 kB | Adobe PDF | View/Open | |
| 8.chapter 4.pdf | 1.06 MB | Adobe PDF | View/Open | |
| 9.chapter 5.pdf | 1.02 MB | Adobe PDF | View/Open |
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