Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/516711
Title: | Efficient parallel architecture for optimizing performance in SoCs |
Researcher: | Mitra, Ved |
Guide(s): | Govil, Mahesh Chandra and Singh, Girdhari |
Keywords: | Computer Science Computer Science Information Systems Engineering and Technology Low-Density Parity-Check Codes System-on-a-chip (SoC) designs |
University: | Malaviya National Institute of Technology Jaipur |
Completed Date: | 2022 |
Abstract: | newline |
Pagination: | xvii,89p. |
URI: | http://hdl.handle.net/10603/516711 |
Appears in Departments: | Department of Computer Science and Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 274.6 kB | Adobe PDF | View/Open |
02_prelims pages.pdf | 3.9 MB | Adobe PDF | View/Open | |
03_contents.pdf | 370.7 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 622.04 kB | Adobe PDF | View/Open | |
05_chapter1.pdf | 747.28 kB | Adobe PDF | View/Open | |
06_chapter2.pdf | 1.4 MB | Adobe PDF | View/Open | |
07_chapter3.pdf | 1.24 MB | Adobe PDF | View/Open | |
08_chapter4.pdf | 1.33 MB | Adobe PDF | View/Open | |
09_chapter5.pdf | 1.22 MB | Adobe PDF | View/Open | |
10_chapter6.pdf | 603.57 kB | Adobe PDF | View/Open | |
11_annexures.pdf | 1.44 MB | Adobe PDF | View/Open | |
80_recommendation.pdf | 876.85 kB | Adobe PDF | View/Open |
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