Performance Analysis of Digital Beam forming Algorithm for Wireless Communication

Abstract

Array signal processing is an important area of signal processing which newlinedeals with the signals received from a sensor array. It has a widespread newlineapplication in the various fields like radar, sonar, wireless newlinecommunication. The major issue is to extract the signal of interest (SOI) newlinein the presence of several interferences received through multiple paths. newlineThese unwanted signals considerably increase the received signal power newlineand cause fading effects. Beamforming is the method to suppress the newlineunwanted signals, reduce the fading effects and enhance the SOI. In order newlineto achieve the useful results different beamforming techniques are newlineemployed. An array of antenna elements is used to spatially steer RF newlinesignals with the goal of changing the overall antenna gain pattern to newlineachieve a higher Signal-to-interference-plus-noise ratio (SINR). Digital newlineBeam forming (DBF) achieves this steering effect by applying weighted newlinecoefficients to antenna elements similar to digital filtering, which adjusts newlinethe phase and gain of the received, or transmitted signal to overcome newlinevariable challenges to system SINR such as dispersive channels or inter newlinedevice interference. This is achieved by applying statistically-based newlinealgorithms to calculate weights adaptively. newlineHere, an adaptive noise cancellation filter technique is used. The newlineRecursive Least Square (RLS) algorithm is used in the filter design newlinebecause it is computationally straightforward, exhibits robust newlineperformance when implemented in hardware with finite precision, and newlineexhibits well-understood convergence performance. Through the use of newlinethe MATLAB/Simulink tool, the RLS algorithm verifies the accuracy and newlineresponsiveness of the adaptive noise cancellation filter. Utilizing the newlineXilinx Tool Box, this algorithm is implemented using the Simulink model newlineas a guide. The System Generator (quotSysGenquot) tool in the Xilinx block set is used to build the bit file that can be downloaded onto the FPGA newlinethrough hardware co-simulation in order to construct the adaptive filter newlineon Xilinx. Adaptive space-time proce