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http://hdl.handle.net/10603/489730
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DC Field | Value | Language |
---|---|---|
dc.coverage.spatial | Datapath elements design in 15nm finfet technology using self controllable voltage level technique | |
dc.date.accessioned | 2023-06-07T09:23:50Z | - |
dc.date.available | 2023-06-07T09:23:50Z | - |
dc.identifier.uri | http://hdl.handle.net/10603/489730 | - |
dc.description.abstract | The primary focus of the work that is presented in this thesis is the design of Fin-type Field Effect Transistor (FinFET) circuits, which include newlineboth the Arithmetic and Logic Units (ALUs). The theory and vocabulary of newlineFinFET technology, as well as technology in general, are examined in depth newlinethroughout the thesis. In order to get a more in-depth understanding of the issue at hand, a variety of original concepts and applications found in the newlineresearch literature have been analysed. Discoveries have shown that there is a potential for developing and manufacturing innovative FinFET-based logic newlinedevices and applications with improved circuit characteristics such as area, newlinecircuit complexity, and clock delays. These improvements have been made newlinepossible by advances in semiconductor technology. This serves as a source of newlineinspiration for me to accomplish the responsibilities that have been entrusted newlineto me as part of this educational programme. In addition, a comprehensive analysis of FinFET circuits is provided, which serves as an overview of the available research in this field. It has been discussed how to develop logic circuits based on FinFET by using a combinational design technique to accomplish so, and this topic has been covered. In the course of newline | |
dc.format.extent | xiii, 131p. | |
dc.language | English | |
dc.relation | p.119-130 | |
dc.rights | university | |
dc.title | Datapath elements design in 15nm finfet technology using self controllable voltage level technique | |
dc.title.alternative | ||
dc.creator.researcher | Duraivel A N | |
dc.subject.keyword | Engineering and Technology | |
dc.subject.keyword | Engineering | |
dc.subject.keyword | Engineering Electrical and Electronic | |
dc.subject.keyword | FinFET circuits | |
dc.subject.keyword | Transistor | |
dc.subject.keyword | semiconductor | |
dc.description.note | ||
dc.contributor.guide | Paulchamy B | |
dc.publisher.place | Chennai | |
dc.publisher.university | Anna University | |
dc.publisher.institution | Faculty of Information and Communication Engineering | |
dc.date.registered | ||
dc.date.completed | 2022 | |
dc.date.awarded | 2022 | |
dc.format.dimensions | 21 cms | |
dc.format.accompanyingmaterial | None | |
dc.source.university | University | |
dc.type.degree | Ph.D. | |
Appears in Departments: | Faculty of Information and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 2.87 MB | Adobe PDF | View/Open |
02_prelim.pdf | 1.79 MB | Adobe PDF | View/Open | |
03_content.pdf | 2.87 MB | Adobe PDF | View/Open | |
04_abstract.pdf | 2.88 MB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 2.87 MB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 2.87 MB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 2.87 MB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 2.87 MB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 2.87 MB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 2.87 MB | Adobe PDF | View/Open | |
11_annexures.pdf | 123.45 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 80.82 kB | Adobe PDF | View/Open |
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