Please use this identifier to cite or link to this item:
http://hdl.handle.net/10603/489575
Title: | Some Approaches to Reduce the Bias Temperature Instability Related Aging Degradation of Logic Circuits |
Researcher: | Bhattacharjee, Abhishek |
Guide(s): | Pradhan, Sambhu Nath |
Keywords: | Engineering Engineering and Technology Engineering Electrical and Electronic |
University: | National Institute of Technology Agartala |
Completed Date: | 2023 |
Abstract: | abstract available |
Pagination: | xxxiv, 137p. |
URI: | http://hdl.handle.net/10603/489575 |
Appears in Departments: | Department of Electronics and Communication Engineering |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
01_title.pdf | Attached File | 288.33 kB | Adobe PDF | View/Open |
02_prelim pages.pdf | 838 kB | Adobe PDF | View/Open | |
03_content.pdf | 212.52 kB | Adobe PDF | View/Open | |
04_abstract.pdf | 188.06 kB | Adobe PDF | View/Open | |
05_chapter 1.pdf | 613.57 kB | Adobe PDF | View/Open | |
06_chapter 2.pdf | 883.68 kB | Adobe PDF | View/Open | |
07_chapter 3.pdf | 1 MB | Adobe PDF | View/Open | |
08_chapter 4.pdf | 1.37 MB | Adobe PDF | View/Open | |
09_chapter 5.pdf | 858.12 kB | Adobe PDF | View/Open | |
10_chapter 6.pdf | 897.43 kB | Adobe PDF | View/Open | |
11_chapter 7.pdf | 299.81 kB | Adobe PDF | View/Open | |
12_annexures.pdf | 386.45 kB | Adobe PDF | View/Open | |
80_recommendation.pdf | 584.7 kB | Adobe PDF | View/Open |
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