Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/489575
Title: Some Approaches to Reduce the Bias Temperature Instability Related Aging Degradation of Logic Circuits
Researcher: Bhattacharjee, Abhishek
Guide(s): Pradhan, Sambhu Nath
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: National Institute of Technology Agartala
Completed Date: 2023
Abstract: abstract available
Pagination: xxxiv, 137p.
URI: http://hdl.handle.net/10603/489575
Appears in Departments:Department of Electronics and Communication Engineering

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01_title.pdfAttached File288.33 kBAdobe PDFView/Open
02_prelim pages.pdf838 kBAdobe PDFView/Open
03_content.pdf212.52 kBAdobe PDFView/Open
04_abstract.pdf188.06 kBAdobe PDFView/Open
05_chapter 1.pdf613.57 kBAdobe PDFView/Open
06_chapter 2.pdf883.68 kBAdobe PDFView/Open
07_chapter 3.pdf1 MBAdobe PDFView/Open
08_chapter 4.pdf1.37 MBAdobe PDFView/Open
09_chapter 5.pdf858.12 kBAdobe PDFView/Open
10_chapter 6.pdf897.43 kBAdobe PDFView/Open
11_chapter 7.pdf299.81 kBAdobe PDFView/Open
12_annexures.pdf386.45 kBAdobe PDFView/Open
80_recommendation.pdf584.7 kBAdobe PDFView/Open
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