1. Shodhganga@INFLIBNET
  2. Koneru Lakshmaiah Education Foundation
  3. Department of Electronics and Communication Engineering
Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/483751
Title: Low Power High Speed Resilient Architectures for High Sensitive Arithmetic Circuits Using Machine Learning Algorithms for Accuracy Analysis
Researcher: Lavanya Maddisetti
Guide(s): S Koteswara Rao and JVR Ravindra
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Koneru Lakshmaiah Education Foundation
Completed Date: 2023
Abstract: newline
Pagination: 
URI: http://hdl.handle.net/10603/483751
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title page.pdfAttached File1.68 MBAdobe PDFView/Open
02_declaration.pdf256.68 kBAdobe PDFView/Open
03_certificate.pdf286.16 kBAdobe PDFView/Open
04_acknowledgement.pdf255.01 kBAdobe PDFView/Open
05_abstract.pdf342.75 kBAdobe PDFView/Open
06_table of contents.pdf303.4 kBAdobe PDFView/Open
07_list of figures.pdf292.6 kBAdobe PDFView/Open
08_list of tables.pdf163.49 kBAdobe PDFView/Open
09_abbrevations.pdf153.9 kBAdobe PDFView/Open
11_chapter 1.pdf773.05 kBAdobe PDFView/Open
12_chapter 2.pdf366.95 kBAdobe PDFView/Open
13_chapter 3.pdf1.06 MBAdobe PDFView/Open
14_chapter 4.pdf1.35 MBAdobe PDFView/Open
15_chapter 5.pdf688.07 kBAdobe PDFView/Open
16_chapter 6.pdf1.29 MBAdobe PDFView/Open
17_chapter 7.pdf360.01 kBAdobe PDFView/Open
18_list of publications.pdf114.33 kBAdobe PDFView/Open
19_references.pdf456.78 kBAdobe PDFView/Open
80_recommendation.pdf6.95 MBAdobe PDFView/Open
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