Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/480761
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dc.coverage.spatialElectronics and Electrical Engineering
dc.date.accessioned2023-05-02T11:08:45Z-
dc.date.available2023-05-02T11:08:45Z-
dc.identifier.urihttp://hdl.handle.net/10603/480761-
dc.description.abstractIn communications adaptive decision feedback equalizers ADFEs are an effective means of countering the intersymbol interference ISI introduced by the channel and also to keep track on the changes in the channel characteristics However high speed applications demand for a large number of taps in the feed forward filter FFF and feedback filter FBF of ADFE and hence the implementation and real time operation of such an equalizer becomes difficult due to increased complexity and very smal
dc.format.extentNot Available
dc.languageEnglish
dc.relationNot Available
dc.rightsself
dc.titleHigh performance architectures for adaptive equalizers using distributed arithmetic
dc.title.alternativeNot available
dc.creator.researcherMatcha, Surya Prakash
dc.subject.keywordEngineering
dc.subject.keywordEngineering and Technology
dc.subject.keywordEngineering Electrical and Electronic
dc.description.noteNot Available
dc.contributor.guideAhamed, Shaik Rafi
dc.publisher.placeGuwahati
dc.publisher.universityIndian Institute of Technology Guwahati
dc.publisher.institutionDEPARTMENT OF ELECTRONICS AND ELECTRICAL ENGINEERING
dc.date.registered2009
dc.date.completed2016
dc.date.awarded2016
dc.format.dimensionsNot Available
dc.format.accompanyingmaterialNone
dc.source.universityUniversity
dc.type.degreePh.D.
Appears in Departments:DEPARTMENT OF ELECTRONICS AND ELECTRICAL ENGINEERING

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