Please use this identifier to cite or link to this item: http://hdl.handle.net/10603/479394
Title: Optimized design of AHB multiple master slave memory controller using VHDL
Researcher: Saluja, Hitanshu
Guide(s): Grover, Naresh
Keywords: Engineering
Engineering and Technology
Engineering Electrical and Electronic
University: Manav Rachna International Institute of Research and Studies
Completed Date: 2022
Pagination: 
URI: http://hdl.handle.net/10603/479394
Appears in Departments:Department of Electronics and Communication Engineering

Files in This Item:
File Description SizeFormat 
01_title (6).pdfAttached File261.53 kBAdobe PDFView/Open
02_prelim pages (8).pdf2.03 MBAdobe PDFView/Open
03_table of contents (3).pdf451.87 kBAdobe PDFView/Open
04_abstract (8).pdf422.99 kBAdobe PDFView/Open
10_chapter 6 (5).pdf607.43 kBAdobe PDFView/Open
11_annexures (2).pdf3.7 MBAdobe PDFView/Open
5_chapter 1.pdf3.79 MBAdobe PDFView/Open
6_chapter 2.pdf531.13 kBAdobe PDFView/Open
7_chapter 3.pdf6.35 MBAdobe PDFView/Open
80_recommendation.pdf30.47 kBAdobe PDFView/Open
8_chapter 4.pdf3.49 MBAdobe PDFView/Open
9_chapter 5.pdf27.47 MBAdobe PDFView/Open
Show full item record


Items in Shodhganga are licensed under Creative Commons Licence Attribution-NonCommercial-ShareAlike 4.0 International (CC BY-NC-SA 4.0).

Altmetric Badge: